Performance Engineer, Kernels
Job Overview
We are hiring two specialized performance roles - Kernels (this posting) and Inference (companion posting). The Performance Engineering team owns the numbers the rest of the company plans against: how fast we serve, how much it costs, and how much we get out of every GPU.
Key points
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You will own the kernel layer.
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Where stock libraries - cuBLAS, cuDNN, FlashAttention, out-of-the-box Triton - leave performance on the table, you will author the custom CUDA, DSL-based…
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CUDA at kernel-authoring level: thread-block sizing, shared-memory layout, warp primitives, async copies (cp.async, TMA), and MMA selection.
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CUTLASS / CuTe DSL at a modify-and-extend level, with comfort in the layout algebra.
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PTX at a debug-and-modify level - you have inserted hand-written PTX where the compiler missed.
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Nsight Compute and Systems fluency: you read a roofline plot and propose the fix.
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Attention kernels: you have authored or modified at least one (FlashAttention-family, paged, MLA, sliding-window, or sparse).
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Multi-architecture awareness: what changes from Hopper to Blackwell (TMA, WGMMA, tcgen05).
Skills
Experience: 5+ years · Job type: Full-time
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Performance Engineer, Kernels · Sarvam AI
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