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Senior RTL Design Engineer

Job Overview

Work with physical implementation team to implement and optimize physical design to meet frequency, area, power goals. Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL.

Key points

  1. Architect, design and implement new features, performance improvements, and ISA extensions in RISC-V CPU core generators.

  2. Microarchitecture development and specification.

  3. Perform initial sandbox verification, and work with design verification team to create and execute thorough verification test plans.

  4. Collaborate with performance modelling team for performance exploration and optimization to meet performance goals.

  5. Expertise in CPU processor designs in one or more of the following areas: instruction fetch and decode; branch prediction…

  6. Knowledge of RISC-V architecture is a plus.

  7. Experience with Scala and/or Chisel is a plus.

  8. Attention to detail and a focus on high-quality design.

Experience: Senior-level · 8+ years